Integrating UML into SoC design process

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn II, Issue , 2005, Pages 836-837

  Zhu, Qiang ^a   Oishi, Ryosuke ^a   Hasegawa, Takashi ^a   Nakata, Tsuneo ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; SPECIFICATIONS; SYSTEMS ANALYSIS;

LOGICAL ERRORS; MEDIA-PROCESSING CHIP; MOBILE DEVICES; SOC DESIGN PROCESS;

COMPUTER PROGRAMMING LANGUAGES;

EID: 33646949684     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.186     Document Type: Conference Paper

References (3)

1. OMG home page, http://www.omg.org/
2. Component Wrapper Language, http://www.labs.fujitsu.com/en/techinfo/cwl/ index.htm
3. Q. Zhu, R. Oishi, T. Hasegawa, T. Nakata, "System-On-Chip Validation using UML and CWL", Proc. of the International Conference on Hardware/Software Co-design and System Synthesis (CODES+ISSS 2004), pp. 92-97, Stockholm, Sweden, Sept., 2004.