Mechanical and electrical analysis of strained liner effect in 35 nm fully depleted silicon-on-insulator devices with ultra thin silicon channels

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 45, Issue 4 B, 2006, Pages 3058-3063

  Gallon, C ^a,e   Fenouillet Beranger, C ^b   Denorme, S ^a   Boeuf, F ^a   Fiori, V ^a   Loubet, N ^a   Vandooren, A ^c   Kormann, T ^d   Broekaart, M ^d   Gouraud, P ^a   Leverd, F ^a   Imbert, G ^a   Chaton, C ^b   Laviron, C ^b   Gabette, L ^d   Vigilant, F ^d   Garnier, P ^a   Bernard, H ^a   Tarnowka, A ^d   Pantel, R ^a   Pionnier, F ^a   Jullian, S ^d   Cristoloveanu, S ^e   Skotnicki, T ^a   more..

^a STMICROELECTRONICS   (France)

^b CEA LETI   (France)

^c Freescale Semiconductors   (France)

^d PHILIPS RESEARCH LABORATORIES   (Germany)

^e IMEP LAHC   (France)

Author keywords

CESL; Fully depleted SOI; Process induced strain; Raised source drain

Indexed keywords

ELECTRIC PROPERTIES; GEOMETRY; SEMICONDUCTING SILICON; SILICON ON INSULATOR TECHNOLOGY; STRAIN; TENSILE PROPERTIES;

CESL; FULLY DEPLETED SOI; PROCESS-INDUCED STRAIN; RAISED SOURCE/DRAIN;

SEMICONDUCTOR DEVICES;

EID: 33646947044     PISSN: 00214922     EISSN: 13474065     Source Type: Journal    
DOI: 10.1143/JJAP.45.3058     Document Type: Article

References (15)

1. ITRS roadmap: http://public.itrs.net
2. J. P. Colinge: Silicon-on-Insulator Technology: Materials to VLSI (Kluwer, Dordrecht, 1991).
3. W. Tsai et al.: IEDM Tech. Dig., 2003, p. 311.
4. S. Thompson et al.: IEDM Tech. Dig., 2002, p. 61.
5. C. H. Ge et al.: IEDM Tech. Dig., 2003, p. 73.
6. K. Rim et al.: TEDM Tech. Dig., 2002, p. 49.
7. I. Aberg et al.: Symp. VLSI Technology, 2004, p. 52.
8. F. Boeuf et al.: IEDM Tech. Dig., 2004, p. 425.
9. C. Diaz et al.: IEDM Tech. Dig., 2003, p. 627.
10. B. Doris et al.: IEDM Tech. Dig., 2002, p. 267.
11. Z. Krivokapic et al.: Symp. VLSI Technology, 2003, p. 131.
12. M. Bruel: U.S. Patent Application, 5374564, 1994.
13. Y. Taur, D. S. Zicherman, D. R. Lombardi, P. J. Restle, C. H. Hsu, H. I. Nanafi, M. R. Wordeman, B. Davari and G. G. Shahidi: IEEE Electron Device Lett. 13 (1992) 267.
14. K. Romanjek, F. Andrieu, T. Ernst and G. Ghibaudo: IEEE Electron Device Lett. 25 (2004) 583.
15. C. Ortolland et al.: ESSDERC 2004, p. 137.