Circuit based quantification: Back to state set manipulation within unbounded model checking

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn II, Issue , 2005, Pages 688-689

  Cabodi, Gianpiero ^a   Crivellari, Marco ^a   Nocco, Sergio ^a   Quer, Stefano ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

FORMAL LOGIC; IMAGE ANALYSIS; KNOWLEDGE REPRESENTATION;

NON-CANONICAL CIRCUIT; PRE-IMAGE VERIFICATIONS; QUANTIFIER ELIMINATION; STATE SET REPRESENTATION;

CIRCUIT THEORY;

EID: 33646941293     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.93     Document Type: Conference Paper

References (5)

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2. M. K. Ganai, A. Gupta, and P. Ashar. Efficient SAT-based Unbounded Symbolic Model Checking Using Circuit Cofactoring. In Proc. Int'l Conf. on Computer-Aided Design, San Jose, California, Nov. 2004.
3. A. Kuehlmann, M. K. Ganai, and V. Paruthi. Circuit-based Boolean Reasoning. In Proc. Design Automat. Conf., Las Vegas, Nevada, June 2001.
4. A. Kuehlmann and F. Krohm. Equivalence Checking Using Cuts and Heaps. In Proc. 34th Design Automat. Conf., pages 263-268, Anaheim, California. June 1997.
5. M. Sheeran, S. Singh, and G. Stålmarck. Checking Safety Properties Using Induction and SAT Solver. In W. A. Hunt and S. D. Johnson, editors, Proc. Formal Methods in Computer-Aided Design, volume 1954 of LNCS, pages 108-125. Springer-Verlag, Nov. 2000.