Systematic transaction level modeling of embedded systems with systemC

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn I, Issue , 2005, Pages 566-567

  Klingauf, Wolfgang ^a  

^a TECHNICAL UNIVERSITY OF BRAUNSCHWEIG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; INTERFACES (COMPUTER); NETWORK PROTOCOLS; SOFTWARE PROTOTYPING; TELECOMMUNICATION SYSTEMS;

ARCHITECTURE EXPLORATION; HW/SW INTERFACES; RAPID PROTOTYPING AND; TRANSACTION LEVEL MODELING (TLM);

EMBEDDED SYSTEMS;

EID: 33646919152     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.293     Document Type: Conference Paper

References (4)

1. OCP-IP home page (www.ocpip.org).
2. L. Cai and D. Gajski. Transaction Level Modeling: An Overview. Proc. CODES+ISSS. October 2003.
3. F. Herrera, H. Posadas, P. Sanchez, and E. Villar. Systematic Embedded Software Generation from SystemC. Proc. DATE, March 2003.
4. S. Pasricha, N. Dutt, and M. Ben-Romdhane. Extending the Transaction Eevel Modeling Approach for Fast Communication Architecture Exploration. Proc. DAC, June 2004.