Resonant-tunneling-diode loads: Speed limits and applications in fast logic circuits

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 1992-February, Issue , 1992, Pages 142-143

  Brown, Elliott R ^a   Hollis, Mark A ^a   Smith, Frank W ^a   Wang, Kem Chung ^b   Asbeck, Peter M ^c  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b ROCKWELL SCIENCE CENTER   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; DIODE LOGIC CIRCUITS; GALLIUM ALLOYS; GALLIUM COMPOUNDS; INDIUM ALLOYS; JUNCTION GATE FIELD EFFECT TRANSISTORS; NEGATIVE RESISTANCE; RESONANT TUNNELING; SEMICONDUCTING INDIUM GALLIUM ARSENIDE; SEMICONDUCTOR ALLOYS; SPICE; TEMPERATURE MEASURING INSTRUMENTS; TIMING CIRCUITS;

DYNAMIC PROPERTY; GATE LENGTH; HIGH SPEED; PEAK-TO-VALLEY RATIOS; RESISTANCE PROPERTIES; SPEED LIMIT; STATIC POWER; STATIC-POWER DISSIPATION;

RESONANT TUNNELING DIODES;

EID: 33646912073     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.1992.200452     Document Type: Conference Paper

References (3)

1. Leai-, K. L., et al., "Monolithic Integration of GaAs/AlGaAs Resonant Tunnel Diode Load and GaAs Enhancement-Mode MESFET Drivel's for Tunnel Diode FET Logic Gates." Int. Symp. GaAs and Related Compounds, Atlanta, p. 593, 1989.
2. Brown, E. R., et al. "Oscillations up to 712GHz in InAs/AlSb Resonant Tunneling diodes." Appl. Phys. Lett., vol. 58, pp. 2291-2293, 1991.
3. Lehovec, K, "GaAs Enhancement-Mode FET Tunnel Diode Ultra-Fast Low-Power Inverter and Memory Cell," IEEE J. Solid-State Circuits, vol. 14, pp. 797-800, 1979.