Hotspot prevention through runtime reconfiguration in network-on-chip

Proceedings -Design, Automation and Test in Europe, DATE '05

Volumn I, Issue , 2005, Pages 648-649

  Link, G M ^a   Vijaykrishnan, N ^a  

^a PENNSYLVANIA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DYNAMIC RECONFIGURATION; LOCATION-SPECIFIC TEMPERATURE PROBLEMS; POWER CONSUMPTION; THERMAL MANAGEMENT TECHNIQUES;

COMPUTATIONAL METHODS; ENERGY UTILIZATION; NETWORKS (CIRCUITS); PROBLEM SOLVING; THERMOANALYSIS;

MICROPROCESSOR CHIPS;

EID: 33646903287     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2005.176     Document Type: Conference Paper

References (3)

1. K. S. et al. HotSpot: Techniques for Modeling Thermal Effects at the Processor Architecture Level. International Workshop on Thermal Investigations of ICs and Systems (THERMINIC), pages 169-172, Oct. 2002.
2. M. Kanellos. At Intel-The Chip with Two Brains. C-Net and http://www.news.com/. August 2002.
3. T. Theocharides, G. M. Link. N. Vijayrkrishnan. and M. J. Irwin. Implementing LDPC Decoder on Network-on-Chip. ISLVSl, January 2005.