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Volumn 2005, Issue , 2005, Pages 148-152
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Debug support, calibration and emulation for multiple processor and powertrain control SoCs
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Author keywords
[No Author keywords available]
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Indexed keywords
BUFFER STORAGE;
CALIBRATION;
COMPUTER ARCHITECTURE;
INTERFACES (COMPUTER);
MICROPROCESSOR CHIPS;
POWER CONTROL;
PROGRAM DEBUGGING;
EMULATION;
MULTI-CORE DEBUG SUPPORT (MCDS);
PACKAGE SIZED-ICE (PSI);
SYSTEM-ON-CHIP (SOC);
PROGRAM PROCESSORS;
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EID: 33646900740
PISSN: 15301591
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/DATE.2005.109 Document Type: Conference Paper |
Times cited : (31)
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References (7)
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