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Volumn 1125, Issue , 1996, Pages 157-

Implementation issues about the embedding of existing high level synthesis algorithms in HOL

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDINGS; FORMAL LOGIC; HIGH LEVEL SYNTHESIS;

EID: 33646869585     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/bfb0105403     Document Type: Conference Paper
Times cited : (5)

References (13)
  • 4
    • 84957689815 scopus 로고
    • An automata theory dedicated towards formal circuit synthesis
    • Aspen Grove, Utah, USA, September, Springer
    • D. Eisenbiegler and R. Kumar. An automata theory dedicated towards formal circuit synthesis. In Higher Order Logic Theorem Proving and Its Applications, Aspen Grove, Utah, USA, September 1995. Springer.
    • (1995) Higher Order Logic Theorem Proving and Its Applications
    • Eisenbiegler, D.1    Kumar, R.2
  • 6
    • 0001550560 scopus 로고
    • Formal hardware verification
    • A. Gupta. Formal hardware verification. Formal Methods in System Design, l(2/3):151-238, 1992.
    • (1992) Formal Methods in System Design , vol.1 , Issue.2-3 , pp. 151-238
    • Gupta, A.1
  • 8
    • 0343480503 scopus 로고
    • Empirical evaluation of some high-level synthesis scheduling heuristics
    • R. Jain, A. Mujumdar, A. Sharma, and H. Wang. Empirical evaluation of some high-level synthesis scheduling heuristics. In DAC '91, pages 210-215, 1991.
    • (1991) DAC '91 , pp. 210-215
    • Jain, R.1    Mujumdar, A.2    Sharma, A.3    Wang, H.4
  • 10
    • 0001933470 scopus 로고
    • Circuit design in Ruby
    • J. Staunstrup, editor, North-Holland
    • G. Jones and M. Sheeran. Circuit design in Ruby. In J. Staunstrup, editor, Formal Methods for VLSI Design, pages 13-70. North-Holland, 1990.
    • (1990) Formal Methods for VLSI Design , pp. 13-70
    • Jones, G.1    Sheeran, M.2
  • 11
    • 85027414220 scopus 로고
    • An engineering approach to formal system design
    • In Thomas F. Melham and Juanito Camilleri, editors, Valetta, Malta, September, Springer
    • M. Larsson. An engineering approach to formal system design. In Thomas F. Melham and Juanito Camilleri, editors, Higher Order Logic Theorem Proving and Its Applications, pages 300-315, Valetta, Malta, September 1994. Springer.
    • (1994) Higher Order Logic Theorem Proving and Its Applications , pp. 300-315
    • Larsson, M.1
  • 13
    • 0024682923 scopus 로고
    • Force-directed scheduling for the behavioral synthesis of asic's
    • Pierre G. Paulin and John P. Knight. Force-directed scheduling for the behavioral synthesis of asic's. IEEE Transactions on Computer Aided Design, 8(6):661-679, June 1989.
    • (1989) IEEE Transactions on Computer Aided Design , vol.8 , Issue.6 , pp. 661-679
    • Paulin, P.G.1    Knight, J.P.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.