Low-Hardware Complexity PRBGs Based on a Piecewise-Linear Chaotic Map

IEEE Transactions on Circuits and Systems II: Express Briefs

Volumn 53, Issue 5, 2006, Pages 329-333

  Addabbo, T ^a   Alioto, M ^a   Fort, A ^a   Rocchi, S ^a   Vignoli, V ^a  

^a UNIVERSITY OF SIENA   (Italy)

Author keywords

Digital integrated circuits; discretized chaotic; maps; pseudorandom bit generators (PRBGs)

Indexed keywords

CHAOS THEORY; COMPUTATIONAL COMPLEXITY; CONFORMAL MAPPING; NONLINEAR NETWORKS; PIECEWISE LINEAR TECHNIQUES; SEQUENTIAL CIRCUITS; STATISTICAL METHODS;

CHAOTIC MAP; HARDWARE COMPLEXITY; LOW-HARDWARE COMPLEXITY; NONLINEAR CONGRUENTIAL GENERATORS; PSEUDORANDOM BIT GENERATORS; SAWTOOTH MAP;

DIGITAL INTEGRATED CIRCUITS;

EID: 33646866943     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2005.862176     Document Type: Article

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