메뉴 건너뛰기




Volumn 3793 LNCS, Issue , 2005, Pages 68-83

Enhancing network processor simulation speed with statistical input sampling

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED SOFTWARE ENGINEERING; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; MICROPROCESSOR CHIPS; STATISTICAL METHODS; TELECOMMUNICATION TRAFFIC;

EID: 33646850021     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11587514_6     Document Type: Conference Paper
Times cited : (3)

References (16)
  • 8
    • 8844264582 scopus 로고    scopus 로고
    • NePSim: A network processor simulator with power evaluation framework
    • Sept/Oct
    • Y. Luo, J. Yang, L. Bhuyan and L. Zhao, "NePSim: A Network Processor Simulator with Power Evaluation Framework," in IEEE Micro, Sept/Oct, 2004
    • (2004) IEEE Micro
    • Luo, Y.1    Yang, J.2    Bhuyan, L.3    Zhao, L.4
  • 9
    • 8844226734 scopus 로고    scopus 로고
    • Optimization and benchmark of cryptographic algorithms on network processors
    • Sept/Oct
    • Z.X. Tan, C. Lin, H. Yin and B.Li, "Optimization and Benchmark of Cryptographic Algorithms on Network Processors" in IEEE Micro, Sept/Oct, 2004
    • (2004) IEEE Micro
    • Tan, Z.X.1    Lin, C.2    Yin, H.3    Li, B.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.