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Volumn 3156, Issue , 2004, Pages 428-440

Attacking DSA under a repeated bits assumption

Author keywords

[No Author keywords available]

Indexed keywords

EMBEDDED SYSTEMS;

EID: 33646756983     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-28632-5_31     Document Type: Article
Times cited : (15)

References (19)
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    • Itoh, K.1    Izu, T.2    Takenaka, M.3
  • 6
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    • A Practical Countermeasure Against Address-Bit Differential Power Analysis
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  • 7
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    • Springer-Verlag LNCS
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    • Kocher, P.C.1
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    • Lenstra, A.K.1    Lenstra, H.W.2    Lovász, L.3
  • 10
    • 68549099555 scopus 로고    scopus 로고
    • Using Second-Order Power Analysis to Attack DPA Resistant Software
    • Springer-Verlag LNCS
    • T.S. Messerges. Using Second-Order Power Analysis to Attack DPA Resistant Software. In Workshop on Cryptographic Hardware and Embedded Systems (CHES), Springer-Verlag LNCS 1965, 238-251, 2000.
    • (2000) Workshop on Cryptographic Hardware and Embedded Systems (CHES) , vol.1965 , pp. 238-251
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  • 11
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  • 13
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    • To appear.
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  • 19
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.