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Nanotechnology
Volumn 17, Issue 10, 2006, Pages 2466-2474
Defect tolerance in resistor-logic demultiplexers for nanoelectronics
Author keywords

[No Author keywords available]
Indexed keywords

DEFECTS; DEMULTIPLEXING; ELECTRIC POTENTIAL; ERROR ANALYSIS; FAULT TOLERANT COMPUTER SYSTEMS; LOGIC DEVICES; RESISTORS;
EID: 33646735946     PISSN: 09574484     EISSN: 13616528     Source Type: Journal    
DOI: 10.1088/0957-4484/17/10/006     Document Type: Article
Times cited : (8)
References (10)
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    • (2003) Science , vol.302 , Issue.5649 , pp. 1377-1379
    • Zhong, Z.1    Wang, D.2    Cui, Y.3    Bockrath, M.W.4    Lieber, C.M.5
  • 2
    • 0032510985 scopus 로고    scopus 로고
    • A defect-tolerant computer architecture: Opportunities for nanotechnology
    • 10.1126/science.280.5370.1716 0036-8075
    • Heath J R, Kuekes P J, Snider G S and Williams R S 1998 A defect-tolerant computer architecture: opportunities for nanotechnology Science 280 1716
    • (1998) Science , vol.280 , Issue.5370 , pp. 1716
    • Heath, J.R.1    Kuekes, P.J.2    Snider, G.S.3    Williams, R.S.4
  • 3
    • 0036608520 scopus 로고    scopus 로고
    • Fault-tolerant techniques for nanocomputers
    • 0957-4484 323
    • Nikolic K, Sadek A and Forshaw M 2002 Fault-tolerant techniques for nanocomputers Nanotechnology 13 357-62
    • (2002) Nanotechnology , vol.13 , Issue.3 , pp. 357-362
    • Nikolic, K.1    Sadek, A.2    Forshaw, M.3
  • 4
    • 0037293712 scopus 로고    scopus 로고
    • A defect-and fault-tolerant architecture for nanocomputers
    • 0957-4484 324
    • Han J and Jonker P 2003 A defect-and fault-tolerant architecture for nanocomputers Nanotechnology 14 224-30
    • (2003) Nanotechnology , vol.14 , Issue.2 , pp. 224-230
    • Han, J.1    Jonker, P.2
  • 7
    • 18744397824 scopus 로고    scopus 로고
    • Defect-tolerant interconnect to nanoelectronic circuits: Internally-redundant demultiplexers based on error-correcting codes
    • 0957-4484 043
    • Kuekes P J, Robinett W, Seroussi G and Williams R S 2005 Defect-tolerant interconnect to nanoelectronic circuits: internally-redundant demultiplexers based on error-correcting codes Nanotechnology 16 869
    • (2005) Nanotechnology , vol.16 , Issue.6 , pp. 869
    • Kuekes, P.J.1    Robinett, W.2    Seroussi, G.3    Williams, R.S.4
  • 8
    • 23444432868 scopus 로고    scopus 로고
    • Improved voltage margins using linear error-correcting codes in resistor-logic demultiplexers for nanoelectronics
    • 0957-4484 001
    • Kuekes P J, Robinett W and Williams R S 2005 Improved voltage margins using linear error-correcting codes in resistor-logic demultiplexers for nanoelectronics Nanotechnology 16 1419-32
    • (2005) Nanotechnology , vol.16 , Issue.9 , pp. 1419-1432
    • Kuekes, P.J.1    Robinett, W.2    Williams, R.S.3
  • 9
    • 31944451658 scopus 로고    scopus 로고
    • Resistor-logic demultiplexers for nanoelectronics based on constant-weight codes
    • 0957-4484 035
    • Kuekes P J, Robinett W, Roth R, Seroussi G, Snider G S and Williams R S 2006 Resistor-logic demultiplexers for nanoelectronics based on constant-weight codes Nanotechnology 17 1052-61
    • (2006) Nanotechnology , vol.17 , Issue.4 , pp. 1052-1061
    • Kuekes, P.J.1    Robinett, W.2    Roth, R.3    Seroussi, G.4    Snider, G.S.5    Williams, R.S.6
  • 10
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    • Effect of conductance variability on resistor-logic demultiplexers for nanoelectronics
    • Kuekes P J, Robinett W and Williams R S 2005 Effect of conductance variability on resistor-logic demultiplexers for nanoelectronics IEEE Trans. Nanotechnol. at press
    • (2005) IEEE Trans. Nanotechnol.
    • Kuekes, P.J.1    Robinett, W.2    Williams, R.S.3

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.