Single-chip, 10-Gigabit Ethernet switch LSI

Fujitsu Scientific and Technical Journal

Volumn 42, Issue 2, 2006, Pages 206-213

  Horie, Takeshi ^a,b,c,d   Shimizu, Takeshi ^a,c,d,e   Hattori, Akira ^b,c,f  

^a FUJITSU LABORATORIES OF AMERICA   (United States)

^b FUJITSU LABORATORIES LTD   (Japan)

^c IPSJ   (Japan)

^d IEEE

^e Fuiitsu Laboratories of America Inc   (United States)

^f Institute of Electronics   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA CENTERS; ETHERNET; I/O CIRCUIT; LARGE STORAGE SYSTEMS;

ENERGY UTILIZATION; INFORMATION TECHNOLOGY; INPUT OUTPUT PROGRAMS; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS; SERVERS; SWITCHING FUNCTIONS;

LSI CIRCUITS;

EID: 33646414190     PISSN: 00162523     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (2)

1. T. Shimizu, Y. Nakagawa, S. Pathi, Y. Umezawa, T. Miyoshi, Y. Koyanagi, T. Horie, and A. Hattori: A Single Chip Shared Memory Switch with Twelve 10Gb Ethernet Ports. Hot Chips 15, August 2003.
2. W. Gai, Y. Hidaka, Y. Koyanagi, J. H. Jiang, H. Osone, and T. Horie: A 4-Channel 3.125Gb/s/ch CMOS Transceiver with 30dB Equalization. 2004 Symposium on VLSI Circuits, 2004, p. 138-11.