Low-complexity bit-parallel canonical and normal basis multipliers for a class of finite fields

IEEE International Symposium on Information Theory - Proceedings

Volumn , Issue , 1998, Pages 294-

  Koc, C K ^a   Sunar, B ^a  

^a Oregon State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIT-PARALLEL; CANONICAL BASIS; FINITE FIELDS; NORMAL BASIS; XOR GATES;

INFORMATION THEORY;

EID: 33645986801     PISSN: 21578095     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISIT.1998.708899     Document Type: Conference Paper

References (6)

1. M. A. Hasan, M. Z. Wang, and V. K. Bhargava. "Modular construction of low complexity parallel multipliers for a class of finite fields GF(2m)," IEEE Transactions on Computers, vol. 41, no. 8, pp. 962-971, August 1992.
2. M. A. Hasan, M. Z. Wang, and V. K. Bhargava. "A modified Massey-Omura parallel multiplier for a class of finite fields," IEEE Transactions on Computers, vol. 42, no. 10, pp. 1278-1280, October 1993.
3. T. Itoh and S. Tsujii. "Structure of parallel multipliers for a class of finite fields GF(2m)," Information and Computation, vol. 83, pp. 21-40, 1989.
4. C. K. K05 and B. Sunar. "Low-complexity bit-parallel canonical and normal basis multipliers for a class of finite fields," IEEE Transactions on Computers, vol. 47, no. 3, pp. 353-356, March 1998.
5. E. D. Mastrovito. VLSI architectures for multiplication over finite field GF(2m). In T. Mora, editor, Applied Algebra, Algebraic Algorithms, and Error-Correcting Codes, 6th International Conference, AAECC-6, pp. 297-309, Rome, Italy, July 1988. New York, NY: Springer-Verlag.
6. J. Omura and J. Massey. "Computational method and apparatus for finite field arithmetic," U.S. Patent Number 4,587,627, May 1986.