Highly cost effective and high performance 65nm S3 (Stacked Single-crystal Si) SRAM technology with 25F2, 0.16um2 cell and doubly stacked SSTFT cell transistors for ultra high density and high speed applications

Digest of Technical Papers - Symposium on VLSI Technology

Volumn 2005, Issue , 2005, Pages 220-221

  Jung, Soon Moon ^a   Rah, Youngseop ^a   Ha, Taehong ^a   Park, Hanhyung ^a   Chang, Chulsoon ^a   Lee, Seungchul ^a   Yun, Jongho ^a   Cho, Wonsuk ^a   Lim, Hoon ^a   Park, Jaikyun ^a   Jeong, Jaehun ^a   Son, Byoungkeun ^a   Jang, Jaehoon ^a   Choi, Bonghyun ^a   Cho, Hoosung ^a   Kim, Kinam ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 33644995313     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/.2005.1469275     Document Type: Conference Paper

References (1)

1. Soon-Moon Jung et al, IEDM Tech. Dig., pp. 265, 2004.