Highly modular and concurrent 2-D DCT chip

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 1992, Pages 1081-1084

  Kim, S P ^a   Pan, D K ^a  

^a POLYTECHNIC UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COSINE TRANSFORMS;

BLOCK TRANSFORMS; D-TRANSFORM; DISCRETE COSINE TRANSFORM(DCT); FAST COMPUTATION; HIGH-SPEED APPLICATIONS; MODULAR STRUCTURES; TOTAL COMPUTATION TIME;

DISCRETE COSINE TRANSFORMS;

EID: 3342941461     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.1992.230292     Document Type: Conference Paper

References (4)

1. M. T. Sun, L. Wu, and M. L. Liou, " A concurrent Architecture for VLSI Implementation of Discrete Cosine Transform, " IEEE Trans, on Circuits and Systems, Vol. CAS-34, No. 8, Aug. 1987.
2. J. C. Carlach, P. Penard, J. L. Sicre, " TCAD: a 27 MHz 8x8 Discrete Cosine Transform Chip, " Proceedings of ICASSF89, pp 2429-2432, 1989
3. Zhi-Jian Mou, F. Justand, " A High-speed Lowcost DCT Architecture for HDTV Applications, " Proceedings of ICASSP'91, pp 1153-1156, Toronto, Canada, 1991
4. A. Artieri, et. al., " A One Chip VLSI For Real Time Two-Dimensional Discrete Cosine Transform, " Proceedings of ISCAS'88, pp 701 - 704, 1988