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Volumn 5969, Issue , 2005, Pages

Low power realization in main blocks of CMOS APS image sensor

Author keywords

A D converter; Active pixel; CMOS image sensor; Low power; OTA

Indexed keywords

CMOS INTEGRATED CIRCUITS; FEEDBACK; OPERATIONAL AMPLIFIERS; OPTIMIZATION; READOUT SYSTEMS; TRANSCONDUCTANCE;

EID: 33244484322     PISSN: 16057422     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.628590     Document Type: Conference Paper
Times cited : (4)

References (10)
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  • 4
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    • Castello, R.1    Gray, P.2
  • 5
    • 0043175261 scopus 로고    scopus 로고
    • Analysis of APS readout circuit delay
    • July
    • K. Salama, A. E. Gamal, "Analysis of APS readout circuit delay", IEEE Trans. Circuits and Systems, vol. 50, pp. 941-945, July 2003
    • (2003) IEEE Trans. Circuits and Systems , vol.50 , pp. 941-945
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  • 8
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    • Kwang-Bo Cho, A. I. Krymski, E. R. Possum, "A 1.5-V 550-μW 176 × 144 autonomous CMOS active pixel image sensor", IEEE Trans. Electron Devices, vol. 50, pp. 96-105, Jan. 2003.
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  • 10
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    • An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.