Practical considerations in the synthesis of high performance digital filters for implementation on FPGAs

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2438 LNCS, Issue , 2002, Pages 886-896

  Carletta, J E ^a   Rayman, M D ^a  

^a University of Akron   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; COMPUTER HARDWARE; DIGITAL FILTERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FREQUENCY RESPONSE; RECONFIGURABLE ARCHITECTURES;

DESIGN AND IMPLEMENTATIONS; HARDWARE COST; HARDWARE IMPLEMENTATIONS; PERFORMANCE MEASURE;

LOGIC SYNTHESIS;

EID: 33244468646     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-46117-5_91     Document Type: Conference Paper

References (9)

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9. Woods, R., S. Ludwig, J. Heron, D. Trainor, and S. Gehring, "FPGA Synthesis on the XC6200 using IRIS and Trianus/Hades", Proc. of the 5th IEEE Symposium on FPGA-based Custom Computing Machines, 1997, pp. 155-164.