Design and evaluation of a cache memory simulation program

Proceedings - 3rd IEEE International Conference on Advanced Learning Technologies, ICALT 2003

Volumn , Issue , 2003, Pages 170-174

  Grigoriadou, Maria ^a   Toula, Maria ^a   Kanidis, Evangelos ^b  

^a UNIVERSITY OF ATHENS   (Greece)

^b Inter University Program of Basic and Applied Cognitive Science   (Greece)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 33144456403     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICALT.2003.1215050     Document Type: Conference Paper

References (12)

1. Asesh, Das, Computer organization teaching-a create your own workbook approach, Conference Proceeding, IEEE, Southeastern, 2000, pp. 193-196.
2. DeNardo, M.A., & Pyzdrowski, S.A. A study of the Effectiveness of Computer-Based Simulations in Teaching Computer Architecture, Haworth Press, pp 125.
3. Grigoriadou M., Kanidis E., Students Approaches to the Computer Cache Memory and their Exploitation in the Development of a Web-based Learning Environment, 8th Pan Hellenic Conference in Informatics, Cyprus, 2001.
4. Grigoriadou M, Toula M., Design and Impementation of a cache memory simulation program, Proceedings-3rd International Conference on Information Communication Technologies in Education, 2002, pp 263-276.
5. Grunbacher, H., Teaching computer architecture/organization using simulators, Proceedings-Frontiers in Education Conference, 3, 1998, pp 1107-1112.
6. Hyde D.C., Teaching design in a computer architecture course, IEEE Micro, 20 (3), pp 23-28.
7. Ibbett, R., Hase DLX Simulation Model, Computer Architecture Education. Micro May/June, pp 57-65.
8. Iowa State University, Department of Computer Science (2002), Memory Hierarchy Design, available at: http://www.cs.iastate.edu/~prabhu/Tutorial/ CACHE/mem-title-2.html
9. Patterson, A.D., & Hennessy, L.J., Computer Architecture-A quantitative approach, Second edition, Morgan Kaufman Publishers inc, 1996.
10. Patterson, A.D., & Hennessy, L.J., Computer Organization & Design, Second edition, Morgan Kaufman Publishers inc, 1999.
11. Rotithor G. H., On the Effective Use of a Cache Memory Simulator in a Computer Architecture Course, IEEE Micro, 38, pp 357-358.
12. University of Massachusetts, Department of Electrical and Computer Engineering (2002), Cache Main Page, available at: http://www.ecs.umass.edu/ece/ koren/ece668/cache/frame0.