The impact of photoresist taper and implant tilt angle on the interwell isolation of sub-quarter micron CMOS technologies

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 3212, Issue , 1997, Pages 228-235

  Gilbert, Percy ^a   Grant, John ^a   Tsui, Paul ^a   King, Charles ^a   Taylor, William ^a   Wimmer, Karl ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS TECHNOLOGIES; KEY FACTORS; PARASITICS; PHOTORESIST PROCESSES; TEST STRUCTURES; TILT ANGLES; TRENCH DEPTHS;

CMOS INTEGRATED CIRCUITS; PHOTORESISTORS; SURFACE TREATMENT; TECHNOLOGY;

PHOTORESISTS;

EID: 32444440951     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.284596     Document Type: Conference Paper

References (4)

1. Voldman et. al., IEDM Tech. Dig., p. 277, 1994.
2. Ishimara et. al., Symp. on VLSI Tech., p. 98, 1994.
3. Perera et. al., IEDM Tech. Dig., p. 679, 1995.
4. Ueshima et. al., Symp. on VLSI Tech., p. 147, 1996.