A novel processor architecture with exact tag-free pointers

IEEE Micro

Volumn 24, Issue 3, 2004, Pages 46-55

  Meyer, Matthias ^a  

^a UNIVERSITY OF STUTTGART   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; COMPUTER OPERATING SYSTEMS; DATA STRUCTURES; EMBEDDED SYSTEMS; JAVA PROGRAMMING LANGUAGE; MATHEMATICAL MODELS; REAL TIME SYSTEMS; REDUCED INSTRUCTION SET COMPUTING;

EXACT TAG FREE POINTERS; GARBAGE COLLECTION ALGORITHM; INCREMENTAL GARBAGE COLLECTION; MARK SWEEP COLLECTION; POINTER FINDING; PROCESSOR ARCHITECTURE; PROCESSOR REGISTERS; PROGRAM STACK;

PROGRAM PROCESSORS;

EID: 3242788091     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2004.2     Document Type: Article

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