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Volumn , Issue , 2003, Pages 932-937

STG optimisation in the direct mapping of asynchronous circuits

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMIC COMPLEXITY; ASYNCHRONOUS CIRCUITS; DIRECT MAPPING; LOGIC SYNTHESIS; MODEL OUTPUTS; MULTIPLE SOLUTIONS; OPTIMAL STATE; SIGNAL TRANSITION GRAPHS;

EID: 3242730214     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2003.1253725     Document Type: Conference Paper
Times cited : (5)

References (11)
  • 3
    • 0017525050 scopus 로고
    • Modular design of asynchronous circuits defined by graphs
    • Aug
    • R. David. Modular design of asynchronous circuits defined by graphs. IEEE Transactions on Computers, 26(8):727-737, Aug. 1977
    • (1977) IEEE Transactions on Computers , vol.26 , Issue.8 , pp. 727-737
    • David, R.1
  • 4
    • 0020310934 scopus 로고
    • Direct implementation of asynchronous control units
    • Dec
    • L.A. Hollaar. Direct implementation of asynchronous control units. IEEE Transactions on Computers, C-31(12):1133-1141, Dec. 1982
    • (1982) IEEE Transactions on Computers C , vol.31 , Issue.12 , pp. 1133-1141
    • Hollaar, L.A.1
  • 5
    • 0003612514 scopus 로고
    • Concurrent hardware: The theory and practice of self-Timed design
    • Wiley-Interscience, John Wiley & Sons, Inc
    • M. Kishinevsky, A. Kondratyev, A. Taubin, and V. Varshavsky. Concurrent hardware: The theory and practice of self-Timed design. Series in Parallel Computing. Wiley-Interscience, John Wiley & Sons, Inc., 1994
    • (1994) Series in Parallel Computing
    • Kishinevsky, M.1    Kondratyev, A.2    Taubin, A.3    Varshavsky, V.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.