Advanced techniques for 3D devices in wafer-bonding processes

Solid State Technology

Volumn 47, Issue 6, 2004, Pages 55-58

  Lindner, P ^a   Dragoi, V ^a   Farrens, S ^a   Glinsner, T ^a   Hangweier, P ^a  

^a EV GROUP   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

BONDING; CHEMICAL BONDS; CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; ELECTRONICS PACKAGING; FLUIDICS; GLASS; HERMETIC SEALS; MICROELECTROMECHANICAL DEVICES; PHASE TRANSITIONS; PLASMAS; RAPID THERMAL ANNEALING; THERMAL DIFFUSION; ULTRAHIGH VACUUM;

ANODIC BONDING; EUTECTIC BONDING; MECHANICAL STRESS; WAFER BONDING;

SILICON WAFERS;

EID: 3142694922     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Review

References (3)

1. U. Goesele, Q.-Y. Tong, Semiconductor Wafer Bonding: Science and Technology, John Wiley and Sons, 1999.
2. Silicon Wafer Bonding Technology for VLSI and MEMS applications, S.S. Iyer, A.J. Auberton-Hervé, eds., INSPEC, London, England, pp. xxi-xxii, 2002.
3. M.J. Madou, Fundamentals of Micro-Fabrication, CRC Press, pp. 378-393, 1997.