Minimizing the number of paths in BDDs: Theory and algorithm

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 25, Issue 1, 2006, Pages 4-11

  Fey, G ^a   Drechsler, R ^a  

^a UNIVERSITY OF BREMEN   (Germany)

Author keywords

Binary decision diagrams; Circuit complexity; Computer aided design; Data structures; Electronic design automation; Formal verification; Logic synthesis

Indexed keywords

ALGORITHMS; AUTOMATION; COMPUTER AIDED DESIGN; DATA REDUCTION; DATA STRUCTURES; FORMAL LOGIC;

BINARY DECISION DIAGRAMS (BDD); CIRCUIT COMPLEXITIES; ELECTRONIC-DESIGN AUTOMATION; FORMAL VERIFICATION; LOGIC SYNTHESIS;

SYSTEMS ANALYSIS;

EID: 31344445647     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2005.852662     Document Type: Article

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