Width optimization of global inductive VLSI interconnects

Microelectronics International

Volumn 23, Issue 1, 2006, Pages 26-30

  Kaushik, Brajesh Kumar ^a   Sarkar, S ^a   Agarwal, R P ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY ROORKEE   (India)

Author keywords

Impedance voltage; Inductance; Optimization techniques

Indexed keywords

EID: 31144460777     PISSN: 13565362     EISSN: None     Source Type: Journal    
DOI: 10.1108/13565360610642723     Document Type: Article

References (25)