High-performance interconnects for on-chip device integration: A new concept called active packaging marries silicon and III-V compound semiconductors

Semiconductor International

Volumn 20, Issue 12, 1997, Pages 115-122

  Kaloyeros, Alain E ^a   Luryi, Serge ^b   Ryan, James G ^c   Sullivan, John J ^d  

^a STATE UNIVERSITY OF NEW YORK   (United States)

^b STONY BROOK UNIVERSITY   (United States)

^c IBM MICROELECTRONICS   (United States)

^d MKS Instruments   (United States)

Author keywords

Active packaging; III Vs; Interconnects

Indexed keywords

EID: 30844438132     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (14)

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