The economics of 300 mm processing: This short course in "Econ 300 mm" examines the costs associated with the transition to 300 mm wafers

Semiconductor International

Volumn 21, Issue 1, 1998, Pages 52-58

  Seligson, Daniel ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 30644470858     PISSN: 01633767     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (8)

1. Global Joint Guidance for 300 mm Semiconductor Factories, July 1997
2. Semiconductor Equipment and Materials International
3. Jack Saltich, ISSM '94
4. Robert Doering, Semiconductor international 1997
5. The author of Figure 1 was not privy to our estimates of Die Cost Reduction.
6. VLSI Research 1997 note on 50% to 100%
7. For those semiconductor manufacturers whose products are constrained by today's scanner field sizes, 9 in. reticles will have an additional impact not captured by this productivity measure.
8. Clark Fuhs, Dataquest, 1994