Moving from weakly endochronous systems to delay-insensitive circuits

Electronic Notes in Theoretical Computer Science

Volumn 146, Issue 2, 2006, Pages 81-103

  Dasgupta, S ^a   Potop Butucaru, D ^b   Caillaud, B ^c   Yakovlev, A ^a  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

^b VERIMAG   (France)

^c CAMPUS DE BEAULIEU   (France)

Author keywords

Delay insensitivity; GALS; Petri net

Indexed keywords

ASYNCHRONOUS MACHINERY; MODULAR CONSTRUCTION; PETRI NETS; PROGRAM PROCESSORS; SYNCHRONOUS MACHINERY;

DELAY-INSENSITIVITY; DLX PROCESSOR MODEL; GALS; MODULAR SYNCHRONOUS SYSTEM;

DELAY CIRCUITS;

EID: 30644462497     PISSN: 15710661     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.entcs.2005.05.037     Document Type: Conference Paper

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