Fast system-level design space exploration for low power configurable multimedia systems-on-chip

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 2002, Pages 150-154

  Polloni, Flavio ^a   Mazzoni, Luca ^a   Di Matteo, Serge ^a  

^a Accent Design Technology Services   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DATA FLOW ANALYSIS; ELECTRIC POWER UTILIZATION; ENERGY EFFICIENCY; MICROPROCESSOR CHIPS; MULTIMEDIA SYSTEMS; PARETO PRINCIPLE; SYSTEM-ON-CHIP; SYSTEMS ANALYSIS;

DESIGN METHODOLOGY; EARLIEST DEADLINE FIRST; EFFICIENT SCHEDULING; FUNCTIONAL MODEL; INDUSTRIAL PROJECTS; MULTIMEDIA ARCHITECTURE; PARETO OPTIMAL SOLUTIONS; WIRELESS MULTIMEDIA;

INTEGRATED CIRCUIT DESIGN;

EID: 3042694197     PISSN: 10630988     EISSN: None     Source Type: Journal    
DOI: 10.1109/ASIC.2002.1158047     Document Type: Article

References (12)

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