A methodology for system-level analog design space exploration

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 1, Issue , 2004, Pages 676-677

  De Bernardinis, F ^a   Vincentelli, A Sangiovanni ^b  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF PISA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG PLATFORM (AP); CIRCUIT DESIGN; NOISE AMPLIFIERS; SYSTEM-LEVEL ANALOG DESIGN SPACE; ABSTRACTION LEVEL; ACHIEVABLE PERFORMANCE; ANALOG COMPONENTS; CIRCUIT CONFIGURATIONS; DESIGN CONFIGURATIONS; DESIGN SPACE EXPLORATION; STATISTICAL SAMPLING; SYSTEM-LEVEL EXPLORATION;

AMPLIFIERS (ELECTRONIC); BANDWIDTH; CODE DIVISION MULTIPLE ACCESS; COMPUTER SIMULATION; DATA MINING; ELECTRIC NETWORK TOPOLOGY; MATHEMATICAL MODELS; OPTIMIZATION; TRANSISTORS; CONSTRAINED OPTIMIZATION; DESIGN; EXHIBITIONS;

INTEGRATED CIRCUIT LAYOUT; SAMPLING;

EID: 3042559914     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268926     Document Type: Conference Paper

References (4)

1. A. Sangiovanni-Vincentelli, "Defining platform-based design," EE-Design, March 2002.
2. L. Carloni, F. De Bernardinis, A. Sangiovanni Vincentelli, and M. Sgroi, "The art and science of integrated systems design," in Proceedings of ESSCIRC'02, pp. 25-36, September 2002.
3. H. Liu, A. Singhee, R. Rutenbar, and L. R. Carley, "Remembrance of circuits past: Macromodeling by data mining in large analog design spaces," in Proceedings of DAC, 2002.
4. F. D. Bernardinis, M. Jordan, and A. S. Vincentelli, "Support vector machines for analog circuit performance representation," in Proc. of DAC, June 2003.