Design of sub-10-picoseconds on-chip time measurement circuit

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 2, Issue , 2004, Pages 804-809

  Abas, M A ^a   Russell, G ^a   Kinniment, D J ^a  

^a NEWCASTLE UNIVERSITY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TEST EQUIPMENTS (ATE); ON-CHIP TIME MEASUREMENT; SYSTEM-ON-CHIP (SOC) TECHNOLOGY; TWO-DELAY INTERPOLATION METHOD (TDIM); CURRENT TECHNOLOGY; DESIGN SOLUTIONS; HIGH-RESOLUTION TIME MEASUREMENT; INTERNAL NODES; INTERPOLATION METHOD; SYSTEM-ON-CHIP; TIME-MEASUREMENT CIRCUITS; TIMING MEASUREMENT;

AMPLIFIERS (ELECTRONIC); AUTOMATIC TESTING; COMPUTER SIMULATION; ELECTRIC CONVERTERS; ELECTRICAL ENGINEERING; ELECTRONICS ENGINEERING; INTEGRATED CIRCUIT LAYOUT; INTERPOLATION; TIME MEASUREMENT; TRANSISTORS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; EXHIBITIONS; MICROPROCESSOR CHIPS;

INTEGRATED CIRCUITS; DESIGN;

EID: 3042517227     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268980     Document Type: Conference Paper

References (5)

1. T. E. Rahkonen and J. T. Kostamovaara, "The use of stabilized CMOS delay lines for the digitization of short time intervals". IEEE Journal of Solid-State Circuits, August 1993, Vol. 28, No. 8, pp. 887-894.
2. S. Tabatabaei and A. Ivanov, "Embedded timing analysis: A SOC infrastructure". IEEE Design and Test of Computers, June 2002, pp 24-36.
3. R. Sumner, "Apparatus and method for measuring time intervals with very high resolution," US patent #6137749 assigned to Leroy Corporation, October 24, 2000.
4. A. Abas, A. Bystrov, D. Kinniment, O. Maevsky, G. Russell, and A. Yakovlev, "Time Difference Amplifier", Electronics Letters 7th Nov. 2002 Vol.38, No.23, pp.1437-1438.
5. T.Y.Hsu, C.C.Wang, and C.Y.Lee, "Design and analysis of a portable high-speed clock generator", IEEE Transactions on circuits and systems II: analog and digital signal processing, Vol.48, No.4, April 2001, pp. 367-375.