메뉴 건너뛰기




Volumn 16, Issue 12, 2005, Pages 1132-1142

High-performance and low-cost dual-thread VLIW processor using weld architecture paradigm

Author keywords

Modeling of computer architecture; Multithreaded processors; VLIW architectures

Indexed keywords

COST EFFECTIVENESS; MATHEMATICAL MODELS; PROGRAM COMPILERS; VARIATIONAL TECHNIQUES; VERY LONG INSTRUCTION WORD ARCHITECTURE;

EID: 30344464097     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2005.150     Document Type: Article
Times cited : (15)

References (32)
  • 9
    • 0038244931 scopus 로고    scopus 로고
    • "Treegion Scheduling for VLIW Processors"
    • master's thesis, Dept. of Electrical and Computer Eng., North Carolina State Univ., Raleigh, North Carolina, July
    • W.A. Havanki, "Treegion Scheduling for VLIW Processors," master's thesis, Dept. of Electrical and Computer Eng., North Carolina State Univ., Raleigh, North Carolina, July 1997.
    • (1997)
    • Havanki, W.A.1
  • 12
    • 0007997616 scopus 로고    scopus 로고
    • "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References"
    • May
    • M. Franklin and G.S. Sohi, "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References," IEEE Trans. Computers, May 1996.
    • (1996) IEEE Trans. Computers
    • Franklin, M.1    Sohi, G.S.2
  • 17
    • 0034839064 scopus 로고    scopus 로고
    • "Tolerating Memory Latency Lhrough Software-Controlled Pre-Execution in Simultaneous Multithreading Processors"
    • June
    • C.-K. Luk, "Tolerating Memory Latency Lhrough Software-Controlled Pre-Execution in Simultaneous Multithreading Processors," Proc. 28th Ann. Int'l Symp. Computer Architecture, June 2001.
    • (2001) Proc. 28th Ann. Int'l Symp. Computer Architecture
    • Luk, C.-K.1
  • 19
    • 0023587656 scopus 로고
    • "Checkpoint Repair for High-Performance Out-of-Order Execution Machines"
    • Dec
    • W.W. Hwu and Y.N. Patt, "Checkpoint Repair for High-Performance Out-of-Order Execution Machines," IEEE Trans. Computers, vol. 36, no. 12, Dec. 1987.
    • (1987) IEEE Trans. Computers , vol.36 , Issue.12
    • Hwu, W.W.1    Patt, Y.N.2
  • 20
    • 0007997616 scopus 로고    scopus 로고
    • "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References"
    • May
    • M. Franklin and G.S. Sohi, "ARB: A Hardware Mechanism for Dynamic Reordering of Memory References," IEEE Trans. Computers, May 1996.
    • (1996) IEEE Trans. Computers
    • Franklin, M.1    Sohi, G.S.2
  • 21
    • 30344447814 scopus 로고    scopus 로고
    • "A Microprocessor Architecture for the New Millennium"
    • Aug
    • M. Tremblay, "A Microprocessor Architecture for the New Millennium," Hot Chips 11, Aug. 1999.
    • (1999) Hot Chips 11
    • Tremblay, M.1
  • 22
    • 30344479599 scopus 로고    scopus 로고
    • Transmeta, CrusoeTM
    • Transmeta, CrusoeTM, http://www.transmeta.com, 2005.
    • (2005)
  • 23
    • 30344435453 scopus 로고    scopus 로고
    • Intel, Intel Itanium Processor at 800MHZ and 733MHZ Data Sheet, May
    • Intel, Intel Itanium Processor at 800MHZ and 733MHZ Data Sheet, May 2001.
    • (2001)
  • 24
    • 0034205402 scopus 로고    scopus 로고
    • "FR500 VLIW-Architecture High-Performance Embedded Microprocessor"
    • June
    • T. Sukemura, "FR500 VLIW-Architecture High-Performance Embedded Microprocessor," FUJITSU Scientific and Technical J., vol 36, no. 1, June 2000.
    • (2000) FUJITSU Scientific and Technical J. , vol.36 , Issue.1
    • Sukemura, T.1
  • 27
    • 30344449309 scopus 로고    scopus 로고
    • Philips, TM 1000 Preliminary Data Book
    • Philips, TM 1000 Preliminary Data Book, 1997.
    • (1997)
  • 29
    • 30344478991 scopus 로고    scopus 로고
    • "Simultaneous Multithreaded DSPs: Scaling from High Performance to Low Power"
    • Bell Laboratories Technical Memorandum 10009639-001024-06TM
    • S. Kaxiras, A.D. Berenbaum, and G. Narlikar, "Simultaneous Multithreaded DSPs: Scaling from High Performance to Low Power," Bell Laboratories Technical Memorandum 10009639-001024-06TM, 2000.
    • (2000)
    • Kaxiras, S.1    Berenbaum, A.D.2    Narlikar, G.3
  • 32
    • 0032178807 scopus 로고    scopus 로고
    • "Elcor's Machine Description System: Version 3.0"
    • HP Technical Report HPL-98-128, Oct
    • S. Aditya, V. Kathail, and B.R. Rau, "Elcor's Machine Description System: Version 3.0," HP Technical Report HPL-98-128, Oct. 1998.
    • (1998)
    • Aditya, S.1    Kathail, V.2    Rau, B.R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.