The implementation of a FPGA hardware debugger system with minimal system overhead

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 3203, Issue , 2004, Pages 1062-1066

  Tombs, J ^a   Aguirre Echanove M A ^a   Munoz F ^a   Baena, V ^a   Torralba, A ^a   Fernandez Leon A ^b   Tortosa, F ^b  

^a UNIVERSITY OF SEVILLE   (Spain)

^b EUROPEAN SPACE AGENCY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER CIRCUITS; CONTROLLERS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTEGRATED CIRCUIT DESIGN;

COMMERCIAL PACKAGES; DIGITAL DESIGNS; EXTERNAL SIGNALS; HARDWARE EMULATION; INTERACTIVE DEBUGGING; INTERNAL MEMORY; MINIMAL SYSTEMS; REAL TIME OBSERVATION;

PROGRAM DEBUGGING;

EID: 29844450989     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-30117-2_127     Document Type: Conference Paper

References (6)

1. Aguirre, M.A, Tombs, J., Torralba, A., Franquelo, L.G. “UNSHADES-1: An advanced tool for In-System Run-Time Hardware Debugging” LNCS, Proc. FPL 2003, Lisboa, Portugal, September 2003
2. ChipScope Pro Software and Cores user manual. Xilinx. UG029. May 2003.
3. Design Verification Using the SignalTap II Embedded Logic Analyzer. Application note 280. Altera. June 2003.
4. Graham P “Logical Hardware Debuggers for FPGA-Based Systems”, PHD Dissertation. Bringham Young University, 2001.
5. Aguirre, M.A, Tombs, J., Torralba, A., Franquelo, L.G “Method for the functional test of large digital circuits using hardware emulators”, International Patent W ES-02/00571 pending. 2002.
6. Aguirre, M.A, Tombs, J., Baena-Lecuyer, V. Mora, J.L., Carrasco, J.M., Torralba, A., Franquelo, L.G. “Microprocessor and FPGA interfaces for in-system co-debugging in field programmable hybrid systems”, accepted for publication in “Microprocessors and Microsystems". Elsevier 2004.