90% Write power-saving SRAM using sense-amplifying memory cell

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 6, 2004, Pages 927-933

  Kanda, Kouichi ^a   Sadaaki, Hattori ^b   Sakurai, Takayasu ^c  

^a FUJITSU LABORATORIES LTD   (Japan)

^b KDDI CORPORATION   (Japan)

^c INSTITUTE OF INDUSTRIAL SCIENCE   (Japan)

Author keywords

Leakage current; Low power; Reduced swing; Sense amplifying cell; SRAM; Write power

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; ELECTRIC POTENTIAL; ENERGY UTILIZATION; LEAKAGE CURRENTS; MATHEMATICAL MODELS; POWER ELECTRONICS; PROBLEM SOLVING;

DRIVING SOURCE LINES (DSL); LEAKAGE POWER REDUCTIONS; REDUCED SWINGS; SENSE-AMPLIFYING CELLS;

STATIC RANDOM ACCESS STORAGE;

EID: 2942691849     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.827793     Document Type: Article

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