An asynchronous, iterative implementation of the original booth multiplication algorithm

Proceedings of the International Symposium on Advanced Research in Asynchronous Circuits and Systems

Volumn 10, Issue , 2004, Pages 207-215

  Efthymiou, A ^a   Suntiamorntut, W ^a   Garside, J ^a   Brackenbury, L E M ^a  

^a UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DATA REDUCTION; ENERGY UTILIZATION; FREQUENCY MULTIPLYING CIRCUITS; ITERATIVE METHODS; MULTIPLEXING; SIGNAL ENCODING;

ASYNCHRONOUS DESIGNS; BOOTH MULTIPLIERS; ITERATIVE MULTIPLIERS;

COMPUTER SCIENCE;

EID: 2942683152     PISSN: 15228681     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (10)

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