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Volumn , Issue , 2004, Pages 277-281

Power-efficient ASIC synthesis of cryptographic sboxes

Author keywords

Cryptography; Low power logic; S box implementation

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; CMOS INTEGRATED CIRCUITS; COMPUTATIONAL COMPLEXITY; CRYPTOGRAPHY; ELECTRIC POWER UTILIZATION; OPTIMIZATION; VECTORS;

EID: 2942679891     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (59)

References (13)
  • 1
    • 2942690967 scopus 로고    scopus 로고
    • AES homepage, available at http://csrc.nist.gov/aes.
    • AES Homepage
  • 3
    • 0025530315 scopus 로고
    • Structured design of cryptographically good S-boxes
    • C. Adams and S. Tavares. Structured design of cryptographically good S-boxes. Journal of Cryptology, 3(1):27-41, 1990.
    • (1990) Journal of Cryptology , vol.3 , Issue.1 , pp. 27-41
    • Adams, C.1    Tavares, S.2
  • 4
    • 0028448901 scopus 로고
    • An analysis of a class of algorithms for S-box construction
    • L. O'Connor. An analysis of a class of algorithms for S-box construction. Journal of Cryptology, 7(3):133-151, 1994.
    • (1994) Journal of Cryptology , vol.7 , Issue.3 , pp. 133-151
    • O'Connor, L.1
  • 5
    • 0028722352 scopus 로고
    • Multi-level network optimization for low power
    • Nov.
    • S. Iman and M. Pedram. Multi-level network optimization for low power. In ICCAD Proceedings, pages 372-377, Nov. 1994.
    • (1994) ICCAD Proceedings , pp. 372-377
    • Iman, S.1    Pedram, M.2
  • 6
    • 0029530288 scopus 로고
    • Two-level logic minimization for low power
    • Nov.
    • S. Iman and M. Pedram. Two-level logic minimization for low power. In ICCAD Proceedings, pages 433-439, Nov. 1995.
    • (1995) ICCAD Proceedings , pp. 433-439
    • Iman, S.1    Pedram, M.2
  • 7
    • 2942693124 scopus 로고    scopus 로고
    • Hardware design and analysis of block cipher components
    • L. Xiao and H. M. Heys. Hardware design and analysis of block cipher components. In Proc. 5th ICISC, 2002.
    • (2002) Proc. 5th ICISC
    • Xiao, L.1    Heys, H.M.2
  • 10
    • 0036933530 scopus 로고    scopus 로고
    • Architectures and vlsi implementations of the aes-proposal rijndael
    • dec
    • N. Sklavos and O. Koufopavlou. Architectures and vlsi implementations of the aes-proposal rijndael. IEEE Trans. on Computers, 51(12):1454-1459, dec 2002.
    • (2002) IEEE Trans. on Computers , vol.51 , Issue.12 , pp. 1454-1459
    • Sklavos, N.1    Koufopavlou, O.2
  • 11
    • 84944877872 scopus 로고    scopus 로고
    • Efficient Rijndael encryption implementation with composite field arithmetic
    • A. Rudra, P. K. Dubey, C. S. Jutla, V. Kumar, J. R. Rao, and P. Rohatgi. Efficient Rijndael encryption implementation with composite field arithmetic. In Proc. CHES 2001, pages 171-184, 2001.
    • (2001) Proc. CHES 2001 , pp. 171-184
    • Rudra, A.1    Dubey, P.K.2    Jutla, C.S.3    Kumar, V.4    Rao, J.R.5    Rohatgi, P.6
  • 12
    • 2942676053 scopus 로고    scopus 로고
    • Hardware implementation of the rijndael sbox: A case study
    • jul
    • M. Macchetti and G. Bertoni. Hardware implementation of the rijndael sbox: a case study. ST Journal of System Research, (0):84-91, jul 2003.
    • (2003) ST Journal of System Research , pp. 84-91
    • Macchetti, M.1    Bertoni, G.2
  • 13
    • 35248894915 scopus 로고    scopus 로고
    • An optimized s-box circuit architecture for low power aes design
    • S. Morioka and A. Satoh. An optimized s-box circuit architecture for low power aes design. In Proc. CHES 2002, pages 172-186, 2003.
    • (2003) Proc. CHES 2002 , pp. 172-186
    • Morioka, S.1    Satoh, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.