Moore's law and the energy requirement of computing versus performance

IEE Proceedings: Circuits, Devices and Systems

Volumn 151, Issue 2, 2004, Pages 190-194

  Kish, L B ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; LOGIC GATES; NANOTECHNOLOGY; TRANSISTORS;

MOORE LAW; SHRINKING NOISE MARGIN;

THERMAL NOISE;

EID: 2942642178     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:20040434     Document Type: Article

References (10)

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3. Huang, B., Qin J., Walters, J., and Bernstein, J.B.: 'Development of derating guidelines for semiconductor devices'. Aerospace Vehicle Systems Institute Report, 2003, unpublished
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10. Kiss, L.B.: 'To the problem of zero-point energy and thermal noise', Solid State Commun., 1988, 67, p. 749