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Volumn 1, Issue 3, 1996, Pages 315-340

Low power realization of finite state machines - A decomposition approach

Author keywords

Decomposition of finite state machines; Lower power design; State assignment

Indexed keywords


EID: 2942586356     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/234860.234862     Document Type: Article
Times cited : (65)

References (17)
  • 2
    • 0029267889 scopus 로고
    • State assignment for low power dissipation
    • BENINI, L. AND DE MICHELI, G. 1995a. State assignment for low power dissipation. IEEE J. Solid State Circuits 30, 3 (March), 258-268.
    • (1995) IEEE J. Solid State Circuits , vol.30 , Issue.3 MARCH , pp. 258-268
    • Benini, L.1    De Micheli, G.2
  • 5
    • 0024168714 scopus 로고
    • MUSTANG: State assignment of finite state machines targeting multilevel logic implementations
    • DEVADAS, S., MA, H., AND NEWTON, R. 1991. MUSTANG: State assignment of finite state machines targeting multilevel logic implementations. IEEE Trans. CAD (Dec.), 1290-1300.
    • (1991) IEEE Trans. CAD (Dec.) , pp. 1290-1300
    • Devadas, S.1    Ma, H.2    Newton, R.3
  • 8
    • 0026985087 scopus 로고
    • A new approach to effective circuit clustering
    • HAGEN, L. AND KAHNG, A. B. 1992. A new approach to effective circuit clustering. In Proceedings of ICCAD (Nov.), 422-427.
    • (1992) Proceedings of ICCAD (Nov.) , pp. 422-427
    • Hagen, L.1    Kahng, A.B.2
  • 9
    • 0027871948 scopus 로고
    • Low-power driven technology mapping under timing constraints
    • LIN, B. AND DE MAN, H. 1993. Low-power driven technology mapping under timing constraints. In Proceedings of ICCD'93 (Oct.), 421-427.
    • (1993) Proceedings of ICCD'93 (Oct.) , pp. 421-427
    • Lin, B.1    De Man, H.2
  • 12
    • 0038263528 scopus 로고
    • Circuit activity driven multilevel logic optimization for low power reliable operation
    • PRASAD, S. C. AND ROY, K. 1993. Circuit activity driven multilevel logic optimization for low power reliable operation. In Proceedings of the EDAC'93 EURO-ASIC (Feb.), 368-372.
    • (1993) Proceedings of the EDAC'93 EURO-ASIC (Feb.) , pp. 368-372
    • Prasad, S.C.1    Roy, K.2
  • 13
    • 0002466869 scopus 로고
    • SYCLOP: Synthesis of CMOS logic for low power applications
    • ROY, K. AND PRASAD, S. C. 1992. SYCLOP: Synthesis of CMOS logic for low power applications. In Proceedings of the ICCD, 464-467.
    • (1992) Proceedings of the ICCD , pp. 464-467
    • Roy, K.1    Prasad, S.C.2
  • 17
    • 33746764793 scopus 로고    scopus 로고
    • M.S. thesis, Dept. of Computer Science, Tsing Hua University, Taiwan
    • WU, S.-S. 1996. State assignment for low power and high speed. M.S. thesis, Dept. of Computer Science, Tsing Hua University, Taiwan.
    • (1996) State Assignment for Low Power and High Speed
    • S-S, W.U.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.