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Volumn , Issue , 2003, Pages 228-232

64-Channel ultrasound transducer amplifier

Author keywords

Broadband amplifiers; Circuit simulation; Circuit testing; CMOS technology; Filters; Preamplifiers; Pulse amplifiers; Real time systems; Ultrasonic imaging; Ultrasonic transducers

Indexed keywords

AMPLIFIERS (ELECTRONIC); BROADBAND AMPLIFIERS; CIRCUIT SIMULATION; CMOS INTEGRATED CIRCUITS; FILTERS (FOR FLUIDS); INTERACTIVE COMPUTER SYSTEMS; PULSE AMPLIFIERS; REAL TIME SYSTEMS; TRANSDUCERS; ULTRASONIC IMAGING; ULTRASONIC TRANSDUCERS;

EID: 29144447634     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SSMSD.2003.1190432     Document Type: Conference Paper
Times cited : (7)

References (9)
  • 1
    • 84942541573 scopus 로고    scopus 로고
    • Three Dimensional Echocariography
    • Goldberg B, ed., Martin Dunitz Ltd, London, UK
    • O. von Ramm, "Three Dimensional Echocariography. In: Ultrasound Contrast Agents," Goldberg B, ed., Martin Dunitz Ltd, London, UK 2002.
    • (2002) Ultrasound Contrast Agents
    • Von Ramm, O.1
  • 2
    • 0032758722 scopus 로고    scopus 로고
    • Real-time Three Dimensional Echocardiography for Measurement of Left Ventricular Volumes
    • M. Schmidt, et-al, "Real-time Three Dimensional Echocardiography for Measurement of Left Ventricular Volumes," American Journal of Cardiology, 1999, Vol 84(12), pp 1434-1439.
    • (1999) American Journal of Cardiology , vol.84 , Issue.12 , pp. 1434-1439
    • Schmidt, M.1
  • 6
    • 0029521438 scopus 로고
    • A CMOS Analog Front-End Circuit for an FDM-Based ADSL System
    • December
    • Z. Chang, et-al, "A CMOS Analog Front-End Circuit for an FDM-Based ADSL System," IEEE Journal of Solid State Circuits, Vol. 30. NO. 12, December 1995.
    • (1995) IEEE Journal of Solid State Circuits , vol.30 , Issue.12
    • Chang, Z.1
  • 8
    • 0028436831 scopus 로고
    • Systematic Capacitance Matching Errors and Corrective Layout Procedures
    • J. McNutt, S. LeMarquis, J. Dunkley, "Systematic Capacitance Matching Errors and Corrective Layout Procedures", IEEE Journal of Solid-State Circuits, vol. 29, no. 5, pp. 611-616, 1994.
    • (1994) IEEE Journal of Solid-State Circuits , vol.29 , Issue.5 , pp. 611-616
    • McNutt, J.1    LeMarquis, S.2    Dunkley, J.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.