Basic Circuit Design of a Neural Processor: Analog CMOS Implementation of Spiking Neurons and Dynamic Synapses

Journal of Robotics and Mechatronics

Volumn 15, Issue 2, 2003, Pages 208-218

  Kanazawa, Yusuke ^a   Asai, Tetsuya ^a   Amemiya, Yoshihito ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

Author keywords

analog VLSI; depressing synapse; dynamic synapse

Indexed keywords

BRAIN; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT DESIGN; INTEGRATION; MEMORY ARCHITECTURE; NETWORK ARCHITECTURE; NEURAL NETWORKS; NEURONS; OXIDE SEMICONDUCTORS; PATTERN RECOGNITION; SILICON COMPOUNDS; SPICE; TIMING CIRCUITS; VLSI CIRCUITS;

ANALOG CMOS; ANALOG VLSI; BASIC CIRCUITS; CIRCUIT DESIGNS; DEPRESSING SYNAPSIS; DYNAMIC SYNAPSIS; LEARN+; NEURAL PROCESSORS; NEURAL-NETWORKS; SPIKING NEURONES;

MOS DEVICES;

EID: 28944447044     PISSN: 09153942     EISSN: 18838049     Source Type: Journal    
DOI: 10.20965/jrm.2003.p0208     Document Type: Article

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