Using infrastructure IPs to support SW-based self-test of processor cores

Proceedings - International Workshop on Microprocessor Test and Verification

Volumn , Issue , 2005, Pages 22-27

  Bernardi, P ^a   Rebaudengo, M ^a   Sonza Reorda, M ^a  

^a POLITECNICO DI TORINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CORE MODULARITY; SELF-TEST APPROACH; SYSTEM-ON-CHIP (SOC);

COMPUTER ARCHITECTURE; INTERNET; MICROCONTROLLERS; MICROPROCESSOR CHIPS; NETWORK PROTOCOLS;

AUTOMATIC TESTING;

EID: 28744444722     PISSN: 15504093     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTV.2004.25     Document Type: Conference Paper

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