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Volumn , Issue , 2005, Pages 381-386

System level power and performance modeling of GALS point-to-point communication interfaces

Author keywords

Globally asynchronous locally synchronous; Mixed clock FIFO; Pausible clock

Indexed keywords

MICROPROCESSOR CHIPS; PERFORMANCE; POWER CONTROL; POWER ELECTRONICS;

EID: 28444449170     PISSN: 15334678     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/lpe.2005.195551     Document Type: Conference Paper
Times cited : (10)

References (12)
  • 2
    • 0034853842 scopus 로고    scopus 로고
    • Robust interfaces for mixed timing systems with application to latency insensitive protocols
    • June Las Vegas, Nevada
    • T. Chelcea, S.M. Nowick, "Robust Interfaces for Mixed Timing Systems with Application to Latency Insensitive Protocols", Proceedings of IEEE Design Automation Conference, June 2001," Las Vegas, Nevada.
    • (2001) Proceedings of IEEE Design Automation Conference
    • Chelcea, T.1    Nowick, S.M.2
  • 3
    • 34648830620 scopus 로고    scopus 로고
    • Simulation and synthesis techniques for asynchronous FIFO design
    • San Jose, CA
    • C.E. Cummings, "Simulation and Synthesis Techniques for Asynchronous FIFO design," SNUG 2002, San Jose, CA.
    • SNUG 2002
    • Cummings, C.E.1
  • 11
    • 0023985457 scopus 로고
    • Beamforming: A versatile approach to spatial filtering
    • April
    • B. D. Van Veen and K. M. Buckley, " Beamforming: a versatile approach to spatial filtering," IEEE ASSP Magazine, vol.5, no.2, pp.4-24, April 1988.
    • (1988) IEEE ASSP Magazine , vol.5 , Issue.2 , pp. 4-24
    • Van Veen, B.D.1    Buckley, K.M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.