Validated 90nm CMOS technology platform with low-k copper interconnects for advanced system-on-chip (SoC)

Records of the IEEE International Workshop on Memory Technology, Design and Testing

Volumn 2002-January, Issue , 2002, Pages 157-162

  Devoivre, T ^a   Lunenborg, M ^b   Julien, C ^a   Carrere, J P ^a   Ferreira, P ^a   Toren, W J ^b   VandeGoor, A ^b   Gayet, P ^a   Berger, T ^a   Hinsinger, O ^a   Vannier, P ^a   Trouiller, Y ^c   Rody, Y ^b   Goirand, P J ^a   Palla, R ^a   Thomas, I ^a   Guyader, F ^a   Roy, D ^a   Borot, B ^a   Planes, N ^a   Naudet, S ^a   Pico, F ^a   Duca, D ^a   Lalanne, F ^a   Heslinga, D ^b   Haond, M ^a   more..

^a STMICROELECTRONICS   (France)

^b NXP SEMICONDUCTORS   (Netherlands)

^c CEA LETI   (France)

Author keywords

CMOS process; CMOS technology; Copper; Energy management; Integrated circuit interconnections; Power supplies; Random access memory; System performance; System on a chip; Technology management

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BANDPASS FILTERS; CMOS INTEGRATED CIRCUITS; COPPER; ELECTRIC POWER SYSTEMS; ENERGY MANAGEMENT; MICROPROCESSOR CHIPS; PROGRAMMABLE LOGIC CONTROLLERS; RANDOM ACCESS STORAGE; STATIC RANDOM ACCESS STORAGE; SYSTEM-ON-CHIP;

CMOS PROCESSS; CMOS TECHNOLOGY; INTEGRATED CIRCUIT INTERCONNECTIONS; POWER SUPPLY; RANDOM ACCESS MEMORY; SYSTEM ON A CHIP; SYSTEM PERFORMANCE; TECHNOLOGY MANAGEMENTS;

INTEGRATED CIRCUIT INTERCONNECTS;

EID: 28444442556     PISSN: 10874852     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTDT.2002.1029778     Document Type: Conference Paper

References (2)

1. M. Fayolle et al, AMC Proceeding, Oct. 2001
2. M. Ishida et al, IEDM Tech. Digest, pp. 201-204, 1998