Using virtual load/store queues (VLSQs) to reduce the negative effects of reordered memory instructions

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2005, Pages 191-200

  Jaleel, Aamer ^a   Jacob, Bruce ^a  

^a UNIVERSITY OF MARYLAND   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER SIZE; MEMORY TRAPS; PROGRAM ORDER; VIRTUAL LOADS;

BUFFER STORAGE; DATA ACQUISITION; ELECTRIC POWER SYSTEMS; PROGRAM PROCESSORS; QUEUEING NETWORKS; STORAGE ALLOCATION (COMPUTER);

ELECTRIC LOADS;

EID: 28444431966     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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