A 90nm CMOS single-chip GPS receiver with 5dBm out-of-band IIP3 2.0dB NF

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Sahu, Debapriya ^a   Das, Abhijit ^a   Darwhekar, Yogesh ^a   Ganesan, Saravana ^a   Rajendran, Gireesh ^a   Kumar, Rakesh ^a   Chandrashekar, B G ^a   Ghosh, Anjana ^a   Gaurav, Anand ^a   Krishnaswamy, T ^a   Goyal, Ashima ^a   Bhagavatheeswaran, Shanthi ^a   Low, Kah Mun ^a   Yanduru, Naveen ^a   Dhamankar, Sudhind ^a   Venkatraman, Srinivasan ^a  

^a TEXAS INSTRUMENTS   (India)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144446796     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Farbod Behbahani et al., "A 27mW GPS Radio in 0.35μm CMOS,"ISSCC Dig. Tech. Papers, pp. 398-399, Feb., 2002.
2. Michiel Steyaert et al., "A Fully-Integrated GPS Receiver Front-End with 40mW Power Consumption," ISSCC Dig. Tech. Papers, pp. 396-397, Feb., 2002.
3. Takahide Kadoyama et al., "A Complete Single-Chip GPS receiver With 1.6-V 24-mW radio in 0.18μm CMOS," IEEE Journal of Solid State Circuits, vol. 39, no. 4, pp. 562-568, April, 2004.
4. James P. Young, "A Highly Integrated Commercial GPS Receiver," IEEE RFIC Symp. Dig. Papers, pp. 75-78, May, 2000.