Low-power embedded SRAM modules with expanded margins for writing

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Yamaoka, Masanao ^a   Maeda, Noriaki ^b   Shinozaki, Yoshihiro ^c   Shimazaki, Yasuhisa ^b   Nii, Koji ^b   Shimada, Shigeru ^b   Yanagisawa, Kazumasa ^b   Kawahara, Takayuki ^a  

^a Hitachi ^*  (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

^c HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POTENTIAL; ENERGY UTILIZATION; LEAKAGE CURRENTS;

ACTIVE POWER; LOW-VOLTAGE; SRAM MODULE; WRITING MARGIN;

STATIC RANDOM ACCESS STORAGE;

EID: 28144444930     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)