A 1V 24GHz 17.5mW PLL in 0.18 μm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Ng, Alan W L ^a   Leung, Gerry C T ^a   Kwok, Ka Chun ^a   Leung, Lincoln L K ^a   Luong, Howard C ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144440671     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. K. C. Kwok and H. C. Luong "A 0.35V 1.46mW Low-Phase-Noise Oscillator with Transformer Feedback in Standard 0-18μm CMOS Process," Proc. IEEE CICC, pp. 21-24, Sep., 2003.
2. H-D, Wohlmuth, D. Kehrer and W. Simbuerger, "A High Sensitivity Static 2:1 Frequency Divider up to 19GHz in 120nm CMOS," Proc. IEEE RFIC Symp., pp. 231-234, June, 2002.
3. H. Wang, "A 1.8V 3mW 16.8GHz Frequency Divider in 0.25μm CMOS," ISSCC Dig. Tech. Papers, pp. 196-197, Feb., 2000.