A 10Gb/s CMOS adaptive equalizer for backplane applications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Gondi, Srikanth ^a   Lee, Jri ^a   Takeuchi, Daishi ^b   Razavi, Behzad ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Kawasaki Microelectronics   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE EQUALIZERS; DATA RATE; DUAL-LOOP ADAPTATION; REVERSE SCALING;

ADAPTIVE SYSTEMS; EQUALIZERS; NETWORKS (CIRCUITS);

CMOS INTEGRATED CIRCUITS;

EID: 28144435991     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)