A 0.5V filter with PLL-based tuning in 0.18μm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 48, Issue , 2005, Pages

  Chatterjee, Shouri ^a   Tsividis, Yannis ^a   Kinget, Peter ^a  

^a Och Spine at New York Presbyterian Hospitals   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 28144432906     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. "The International Technology Roadmap for Semiconductors," 2001, http://public.itrs.net
2. S. Chatterjee, Y. Tsividis, P. Kinget, "A 0.5-V Bulk-Input Fully Differential Operational Transconductance Amplifier," Proc. ESSCIRC, pp. 147-150, Sept., 2004.
3. M. Banu and Y. Tsividis, "An Elliptic Continuous-Time CMOS Filter with On-Chip Automatic Tuning," IEEE J. Solid-State Circuits, vol. SC-20, pp. 1114-1121, Dec., 1985.