A PVD based barrier technology for the 45 nm node

Microelectronic Engineering

Volumn 82, Issue 3-4 SPEC. ISS., 2005, Pages 594-599

  Forster, J ^a   Gopalraja, P ^a   Gung, T J ^a   Sundarrajan, A ^a   Fu, X ^a   Hammond, N ^a   Fu, J ^a   Kelkar, U ^a   Bhatnagar, A ^a  

^a APPLIED MATERIALS INC   (United States)

Author keywords

Barrier metal; Metallization reliability; Physical vapor deposition

Indexed keywords

ELECTRIC RESISTANCE; ELECTROMIGRATION; PHYSICAL VAPOR DEPOSITION; THICKNESS MEASUREMENT;

BARRIER METAL; METALLIZATION RELIABILITY;

MICROELECTRONICS;

EID: 28044468187     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2005.07.062     Document Type: Conference Paper

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